
2011 Microchip Technology Inc.
DS39932D-page 147
PIC18F46J11 FAMILY
TABLE 10-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
RD6/PMD6/
RP23
RD6
1
I
ST
PORTD<6> data input.
0
O
DIG
LATD<6> data output.
PMD6
1
I
ST/TTL Parallel Master Port data in.
0
O
DIG
Parallel Master Port data out.
RP23
1
I
ST
Remappable peripheral pin 23 input.
0
O
DIG
Remappable peripheral pin 23 output.
RD7/PMD7/
RP24
RD7
1
I
ST
PORTD<7> data input.
0
O
DIG
LATD<7> data output.
PMD7
1
I
ST/TTL Parallel Master Port data in.
0
O
DIG
Parallel Master Port data out.
RP24
1
I
ST
Remappable peripheral pin 24 input.
0
O
DIG
Remappable peripheral pin 24 output.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
PORTD(1)
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
LATD(1)
LATD7
LATD6
LATD5
LATD4
LATD3
LATD2
LATD1
LATD0
TRISD(1)
TRISD7
TRISD6
TRISD5
TRISD4
TRISD3
TRISD2
TRISD1
TRISD0
Legend:
— = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
Note 1:
These registers are not available in 28-pin devices.
TABLE 10-9:
PORTD I/O SUMMARY (CONTINUED)
Pin
Function
TRIS
Setting
I/O
Type
Description
Legend:
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; I2C/SMB = I2C/SMBus
input buffer; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).